Struct Disassembler

pub struct Disassembler<'a> { /* private fields */ }

A Pulley bytecode disassembler.

This is implemented as an OpVisitor, where you pass a Disassembler to a Decoder in order to disassemble instructions from a bytecode stream.

Alternatively, you can use the Disassembler::disassemble_all method to disassemble a complete bytecode stream.

Implementations

impl<'a> Disassembler<'a>

pub fn disassemble_all(bytecode: &'a [u8]) -> Result<String>

Disassemble every instruction in the given bytecode stream.

pub fn new(bytecode: &'a [u8]) -> Self

Create a new Disassembler that can be used to incrementally disassemble instructions from the given bytecode stream.

pub fn offsets(&mut self, offsets: bool) -> &mut Self

Whether to prefix each instruction’s disassembly with its offset.

True by default.

pub fn hexdump(&mut self, hexdump: bool) -> &mut Self

Whether to include a hexdump of the bytecode in the disassembly.

True by default.

pub fn br_tables(&mut self, enable: bool) -> &mut Self

Whether to include branche tables in the disassembly.

True by default.

pub fn start_offset(&mut self, offset: usize) -> &mut Self

Configures the offset that this function starts from, if it doesn’t start from 0.

This can possibly be useful when a single function at a time is being disassembled.

pub fn disas(&self) -> &str

Get the disassembly thus far.

Trait Implementations

impl ExtendedOpVisitor for Disassembler<'_>

fn trap(&mut self)

Raise a trap.

fn nop(&mut self)

Do nothing.

fn call_indirect_host(&mut self, id: u8)

A special opcode to halt interpreter execution and yield control back to the host.

fn xmov_fp(&mut self, dst: XReg)

Gets the special “fp” register and moves it into dst.

fn xmov_lr(&mut self, dst: XReg)

Gets the special “lr” register and moves it into dst.

fn bswap32(&mut self, dst: XReg, src: XReg)

dst = byteswap(low32(src))

fn bswap64(&mut self, dst: XReg, src: XReg)

dst = byteswap(src)

fn xadd32_uoverflow_trap(&mut self, operands: BinaryOperands<XReg>)

32-bit checked unsigned addition: low32(dst) = low32(src1) + low32(src2).

fn xadd64_uoverflow_trap(&mut self, operands: BinaryOperands<XReg>)

64-bit checked unsigned addition: dst = src1 + src2.

fn xmulhi64_s(&mut self, operands: BinaryOperands<XReg>)

dst = high64(src1 * src2) (signed)

fn xmulhi64_u(&mut self, operands: BinaryOperands<XReg>)

dst = high64(src1 * src2) (unsigned)

fn xbmask32(&mut self, dst: XReg, src: XReg)

low32(dst) = if low32(src) == 0 { 0 } else { -1 }

fn xbmask64(&mut self, dst: XReg, src: XReg)

dst = if src == 0 { 0 } else { -1 }

fn xload16be_u32_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = zext(*addr)

fn xload16be_s32_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = sext(*addr)

fn xload32be_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = zext(*addr)

fn xload64be_o32(&mut self, dst: XReg, addr: AddrO32)

dst = *addr

fn xstore16be_o32(&mut self, addr: AddrO32, src: XReg)

*addr = low16(src)

fn xstore32be_o32(&mut self, addr: AddrO32, src: XReg)

*addr = low32(src)

fn xstore64be_o32(&mut self, addr: AddrO32, src: XReg)

*addr = low64(src)

fn fload32be_o32(&mut self, dst: FReg, addr: AddrO32)

low32(dst) = zext(*addr)

fn fload64be_o32(&mut self, dst: FReg, addr: AddrO32)

dst = *addr

fn fstore32be_o32(&mut self, addr: AddrO32, src: FReg)

*addr = low32(src)

fn fstore64be_o32(&mut self, addr: AddrO32, src: FReg)

*addr = src

fn fload32le_o32(&mut self, dst: FReg, addr: AddrO32)

low32(dst) = zext(*addr)

fn fload64le_o32(&mut self, dst: FReg, addr: AddrO32)

dst = *addr

fn fstore32le_o32(&mut self, addr: AddrO32, src: FReg)

*addr = low32(src)

fn fstore64le_o32(&mut self, addr: AddrO32, src: FReg)

*addr = src

fn fload32le_z(&mut self, dst: FReg, addr: AddrZ)

low32(dst) = zext(*addr)

fn fload64le_z(&mut self, dst: FReg, addr: AddrZ)

dst = *addr

fn fstore32le_z(&mut self, addr: AddrZ, src: FReg)

*addr = low32(src)

fn fstore64le_z(&mut self, addr: AddrZ, src: FReg)

*addr = src

fn fload32le_g32(&mut self, dst: FReg, addr: AddrG32)

low32(dst) = zext(*addr)

fn fload64le_g32(&mut self, dst: FReg, addr: AddrG32)

dst = *addr

fn fstore32le_g32(&mut self, addr: AddrG32, src: FReg)

*addr = low32(src)

fn fstore64le_g32(&mut self, addr: AddrG32, src: FReg)

*addr = src

fn vload128le_o32(&mut self, dst: VReg, addr: AddrO32)

dst = *addr

fn vstore128le_o32(&mut self, addr: AddrO32, src: VReg)

*addr = src

fn vload128le_z(&mut self, dst: VReg, addr: AddrZ)

dst = *(ptr + offset)

fn vstore128le_z(&mut self, addr: AddrZ, src: VReg)

*(ptr + offset) = src

fn vload128le_g32(&mut self, dst: VReg, addr: AddrG32)

dst = *(ptr + offset)

fn vstore128le_g32(&mut self, addr: AddrG32, src: VReg)

*(ptr + offset) = src

fn fmov(&mut self, dst: FReg, src: FReg)

Move between f registers.

fn vmov(&mut self, dst: VReg, src: VReg)

Move between v registers.

fn bitcast_int_from_float_32(&mut self, dst: XReg, src: FReg)

low32(dst) = bitcast low32(src) as i32

fn bitcast_int_from_float_64(&mut self, dst: XReg, src: FReg)

dst = bitcast src as i64

fn bitcast_float_from_int_32(&mut self, dst: FReg, src: XReg)

low32(dst) = bitcast low32(src) as f32

fn bitcast_float_from_int_64(&mut self, dst: FReg, src: XReg)

dst = bitcast src as f64

fn fconst32(&mut self, dst: FReg, bits: u32)

low32(dst) = bits

fn fconst64(&mut self, dst: FReg, bits: u64)

dst = bits

fn feq32(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 == src2)

fn fneq32(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 != src2)

fn flt32(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 < src2)

fn flteq32(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 <= src2)

fn feq64(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 == src2)

fn fneq64(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 != src2)

fn flt64(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 < src2)

fn flteq64(&mut self, dst: XReg, src1: FReg, src2: FReg)

low32(dst) = zext(src1 <= src2)

fn fselect32(&mut self, dst: FReg, cond: XReg, if_nonzero: FReg, if_zero: FReg)

low32(dst) = low32(cond) ? low32(if_nonzero) : low32(if_zero)

fn fselect64(&mut self, dst: FReg, cond: XReg, if_nonzero: FReg, if_zero: FReg)

dst = low32(cond) ? if_nonzero : if_zero

fn f32_from_f64(&mut self, dst: FReg, src: FReg)

low32(dst) = demote(src)

fn f64_from_f32(&mut self, dst: FReg, src: FReg)

(st) = promote(low32(src))

fn f32_from_x32_s(&mut self, dst: FReg, src: XReg)

low32(dst) = checked_f32_from_signed(low32(src))

fn f32_from_x32_u(&mut self, dst: FReg, src: XReg)

low32(dst) = checked_f32_from_unsigned(low32(src))

fn f32_from_x64_s(&mut self, dst: FReg, src: XReg)

low32(dst) = checked_f32_from_signed(src)

fn f32_from_x64_u(&mut self, dst: FReg, src: XReg)

low32(dst) = checked_f32_from_unsigned(src)

fn f64_from_x32_s(&mut self, dst: FReg, src: XReg)

dst = checked_f64_from_signed(low32(src))

fn f64_from_x32_u(&mut self, dst: FReg, src: XReg)

dst = checked_f64_from_unsigned(low32(src))

fn f64_from_x64_s(&mut self, dst: FReg, src: XReg)

dst = checked_f64_from_signed(src)

fn f64_from_x64_u(&mut self, dst: FReg, src: XReg)

dst = checked_f64_from_unsigned(src)

fn x32_from_f32_s(&mut self, dst: XReg, src: FReg)

low32(dst) = checked_signed_from_f32(low32(src))

fn x32_from_f32_u(&mut self, dst: XReg, src: FReg)

low32(dst) = checked_unsigned_from_f32(low32(src))

fn x32_from_f64_s(&mut self, dst: XReg, src: FReg)

low32(dst) = checked_signed_from_f64(src)

fn x32_from_f64_u(&mut self, dst: XReg, src: FReg)

low32(dst) = checked_unsigned_from_f64(src)

fn x64_from_f32_s(&mut self, dst: XReg, src: FReg)

dst = checked_signed_from_f32(low32(src))

fn x64_from_f32_u(&mut self, dst: XReg, src: FReg)

dst = checked_unsigned_from_f32(low32(src))

fn x64_from_f64_s(&mut self, dst: XReg, src: FReg)

dst = checked_signed_from_f64(src)

fn x64_from_f64_u(&mut self, dst: XReg, src: FReg)

dst = checked_unsigned_from_f64(src)

fn x32_from_f32_s_sat(&mut self, dst: XReg, src: FReg)

low32(dst) = saturating_signed_from_f32(low32(src))

fn x32_from_f32_u_sat(&mut self, dst: XReg, src: FReg)

low32(dst) = saturating_unsigned_from_f32(low32(src))

fn x32_from_f64_s_sat(&mut self, dst: XReg, src: FReg)

low32(dst) = saturating_signed_from_f64(src)

fn x32_from_f64_u_sat(&mut self, dst: XReg, src: FReg)

low32(dst) = saturating_unsigned_from_f64(src)

fn x64_from_f32_s_sat(&mut self, dst: XReg, src: FReg)

dst = saturating_signed_from_f32(low32(src))

fn x64_from_f32_u_sat(&mut self, dst: XReg, src: FReg)

dst = saturating_unsigned_from_f32(low32(src))

fn x64_from_f64_s_sat(&mut self, dst: XReg, src: FReg)

dst = saturating_signed_from_f64(src)

fn x64_from_f64_u_sat(&mut self, dst: XReg, src: FReg)

dst = saturating_unsigned_from_f64(src)

fn fcopysign32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = copysign(low32(src1), low32(src2))

fn fcopysign64(&mut self, operands: BinaryOperands<FReg>)

dst = copysign(src1, src2)

fn fadd32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = low32(src1) + low32(src2)

fn fsub32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = low32(src1) - low32(src2)

fn vsubf32x4(&mut self, operands: BinaryOperands<VReg>)

low128(dst) = low128(src1) - low128(src2)

fn fmul32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = low32(src1) * low32(src2)

fn vmulf32x4(&mut self, operands: BinaryOperands<VReg>)

low128(dst) = low128(src1) * low128(src2)

fn fdiv32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = low32(src1) / low32(src2)

fn vdivf32x4(&mut self, operands: BinaryOperands<VReg>)

low128(dst) = low128(src1) / low128(src2)

fn fmaximum32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = ieee_maximum(low32(src1), low32(src2))

fn fminimum32(&mut self, operands: BinaryOperands<FReg>)

low32(dst) = ieee_minimum(low32(src1), low32(src2))

fn ftrunc32(&mut self, dst: FReg, src: FReg)

low32(dst) = ieee_trunc(low32(src))

fn vtrunc32x4(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_trunc(low128(src))

fn vtrunc64x2(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_trunc(low128(src))

fn ffloor32(&mut self, dst: FReg, src: FReg)

low32(dst) = ieee_floor(low32(src))

fn vfloor32x4(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_floor(low128(src))

fn vfloor64x2(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_floor(low128(src))

fn fceil32(&mut self, dst: FReg, src: FReg)

low32(dst) = ieee_ceil(low32(src))

fn vceil32x4(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_ceil(low128(src))

fn vceil64x2(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_ceil(low128(src))

fn fnearest32(&mut self, dst: FReg, src: FReg)

low32(dst) = ieee_nearest(low32(src))

fn fsqrt32(&mut self, dst: FReg, src: FReg)

low32(dst) = ieee_sqrt(low32(src))

fn vsqrt32x4(&mut self, dst: VReg, src: VReg)

low32(dst) = ieee_sqrt(low32(src))

fn vsqrt64x2(&mut self, dst: VReg, src: VReg)

low32(dst) = ieee_sqrt(low32(src))

fn fneg32(&mut self, dst: FReg, src: FReg)

low32(dst) = -low32(src)

fn vnegf32x4(&mut self, dst: VReg, src: VReg)

low128(dst) = -low128(src)

fn fabs32(&mut self, dst: FReg, src: FReg)

low32(dst) = |low32(src)|

fn fadd64(&mut self, operands: BinaryOperands<FReg>)

dst = src1 + src2

fn fsub64(&mut self, operands: BinaryOperands<FReg>)

dst = src1 - src2

fn fmul64(&mut self, operands: BinaryOperands<FReg>)

dst = src1 * src2

fn fdiv64(&mut self, operands: BinaryOperands<FReg>)

dst = src1 / src2

fn vdivf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 / src2

fn fmaximum64(&mut self, operands: BinaryOperands<FReg>)

dst = ieee_maximum(src1, src2)

fn fminimum64(&mut self, operands: BinaryOperands<FReg>)

dst = ieee_minimum(src1, src2)

fn ftrunc64(&mut self, dst: FReg, src: FReg)

dst = ieee_trunc(src)

fn ffloor64(&mut self, dst: FReg, src: FReg)

dst = ieee_floor(src)

fn fceil64(&mut self, dst: FReg, src: FReg)

dst = ieee_ceil(src)

fn fnearest64(&mut self, dst: FReg, src: FReg)

dst = ieee_nearest(src)

fn vnearest32x4(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_nearest(low128(src))

fn vnearest64x2(&mut self, dst: VReg, src: VReg)

low128(dst) = ieee_nearest(low128(src))

fn fsqrt64(&mut self, dst: FReg, src: FReg)

dst = ieee_sqrt(src)

fn fneg64(&mut self, dst: FReg, src: FReg)

dst = -src

fn fabs64(&mut self, dst: FReg, src: FReg)

dst = |src|

fn vconst128(&mut self, dst: VReg, imm: u128)

dst = imm

fn vaddi8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src1 + src2

fn vaddi16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src1 + src2

fn vaddi32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src1 + src2

fn vaddi64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 + src2

fn vaddf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src1 + src2

fn vaddf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 + src2

fn vaddi8x16_sat(&mut self, operands: BinaryOperands<VReg>)

dst = satruating_add(src1, src2)

fn vaddu8x16_sat(&mut self, operands: BinaryOperands<VReg>)

dst = satruating_add(src1, src2)

fn vaddi16x8_sat(&mut self, operands: BinaryOperands<VReg>)

dst = satruating_add(src1, src2)

fn vaddu16x8_sat(&mut self, operands: BinaryOperands<VReg>)

dst = satruating_add(src1, src2)

fn vaddpairwisei16x8_s(&mut self, operands: BinaryOperands<VReg>)

dst = [src1[0] + src1[1], ..., src2[6] + src2[7]]

fn vaddpairwisei32x4_s(&mut self, operands: BinaryOperands<VReg>)

dst = [src1[0] + src1[1], ..., src2[2] + src2[3]]

fn vshli8x16(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 << src2

fn vshli16x8(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 << src2

fn vshli32x4(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 << src2

fn vshli64x2(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 << src2

fn vshri8x16_s(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (signed)

fn vshri16x8_s(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (signed)

fn vshri32x4_s(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (signed)

fn vshri64x2_s(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (signed)

fn vshri8x16_u(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (unsigned)

fn vshri16x8_u(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (unsigned)

fn vshri32x4_u(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (unsigned)

fn vshri64x2_u(&mut self, operands: BinaryOperands<VReg, VReg, XReg>)

dst = src1 >> src2 (unsigned)

fn vsplatx8(&mut self, dst: VReg, src: XReg)

dst = splat(low8(src))

fn vsplatx16(&mut self, dst: VReg, src: XReg)

dst = splat(low16(src))

fn vsplatx32(&mut self, dst: VReg, src: XReg)

dst = splat(low32(src))

fn vsplatx64(&mut self, dst: VReg, src: XReg)

dst = splat(src)

fn vsplatf32(&mut self, dst: VReg, src: FReg)

dst = splat(low32(src))

fn vsplatf64(&mut self, dst: VReg, src: FReg)

dst = splat(src)

fn vload8x8_s_z(&mut self, dst: VReg, addr: AddrZ)

Load the 64-bit source as i8x8 and sign-extend to i16x8.

fn vload8x8_u_z(&mut self, dst: VReg, addr: AddrZ)

Load the 64-bit source as u8x8 and zero-extend to i16x8.

fn vload16x4le_s_z(&mut self, dst: VReg, addr: AddrZ)

Load the 64-bit source as i16x4 and sign-extend to i32x4.

fn vload16x4le_u_z(&mut self, dst: VReg, addr: AddrZ)

Load the 64-bit source as u16x4 and zero-extend to i32x4.

fn vload32x2le_s_z(&mut self, dst: VReg, addr: AddrZ)

Load the 64-bit source as i32x2 and sign-extend to i64x2.

fn vload32x2le_u_z(&mut self, dst: VReg, addr: AddrZ)

Load the 64-bit source as u32x2 and zero-extend to i64x2.

fn vband128(&mut self, operands: BinaryOperands<VReg>)

dst = src1 & src2

fn vbor128(&mut self, operands: BinaryOperands<VReg>)

dst = src1 | src2

fn vbxor128(&mut self, operands: BinaryOperands<VReg>)

dst = src1 ^ src2

fn vbnot128(&mut self, dst: VReg, src: VReg)

dst = !src1

fn vbitselect128(&mut self, dst: VReg, c: VReg, x: VReg, y: VReg)

dst = (c & x) | (!c & y)

fn vbitmask8x16(&mut self, dst: XReg, src: VReg)

Collect high bits of each lane into the low 32-bits of the destination.

fn vbitmask16x8(&mut self, dst: XReg, src: VReg)

Collect high bits of each lane into the low 32-bits of the destination.

fn vbitmask32x4(&mut self, dst: XReg, src: VReg)

Collect high bits of each lane into the low 32-bits of the destination.

fn vbitmask64x2(&mut self, dst: XReg, src: VReg)

Collect high bits of each lane into the low 32-bits of the destination.

fn valltrue8x16(&mut self, dst: XReg, src: VReg)

Store whether all lanes are nonzero in dst.

fn valltrue16x8(&mut self, dst: XReg, src: VReg)

Store whether all lanes are nonzero in dst.

fn valltrue32x4(&mut self, dst: XReg, src: VReg)

Store whether all lanes are nonzero in dst.

fn valltrue64x2(&mut self, dst: XReg, src: VReg)

Store whether any lanes are nonzero in dst.

fn vanytrue8x16(&mut self, dst: XReg, src: VReg)

Store whether any lanes are nonzero in dst.

fn vanytrue16x8(&mut self, dst: XReg, src: VReg)

Store whether any lanes are nonzero in dst.

fn vanytrue32x4(&mut self, dst: XReg, src: VReg)

Store whether any lanes are nonzero in dst.

fn vanytrue64x2(&mut self, dst: XReg, src: VReg)

Store whether any lanes are nonzero in dst.

fn vf32x4_from_i32x4_s(&mut self, dst: VReg, src: VReg)

Int-to-float conversion (same as f32_from_x32_s)

fn vf32x4_from_i32x4_u(&mut self, dst: VReg, src: VReg)

Int-to-float conversion (same as f32_from_x32_u)

fn vf64x2_from_i64x2_s(&mut self, dst: VReg, src: VReg)

Int-to-float conversion (same as f64_from_x64_s)

fn vf64x2_from_i64x2_u(&mut self, dst: VReg, src: VReg)

Int-to-float conversion (same as f64_from_x64_u)

fn vi32x4_from_f32x4_s(&mut self, dst: VReg, src: VReg)

Float-to-int conversion (same as x32_from_f32_s

fn vi32x4_from_f32x4_u(&mut self, dst: VReg, src: VReg)

Float-to-int conversion (same as x32_from_f32_u

fn vi64x2_from_f64x2_s(&mut self, dst: VReg, src: VReg)

Float-to-int conversion (same as x64_from_f64_s

fn vi64x2_from_f64x2_u(&mut self, dst: VReg, src: VReg)

Float-to-int conversion (same as x64_from_f64_u

fn vwidenlow8x16_s(&mut self, dst: VReg, src: VReg)

Widens the low lanes of the input vector, as signed, to twice the width.

fn vwidenlow8x16_u(&mut self, dst: VReg, src: VReg)

Widens the low lanes of the input vector, as unsigned, to twice the width.

fn vwidenlow16x8_s(&mut self, dst: VReg, src: VReg)

Widens the low lanes of the input vector, as signed, to twice the width.

fn vwidenlow16x8_u(&mut self, dst: VReg, src: VReg)

Widens the low lanes of the input vector, as unsigned, to twice the width.

fn vwidenlow32x4_s(&mut self, dst: VReg, src: VReg)

Widens the low lanes of the input vector, as signed, to twice the width.

fn vwidenlow32x4_u(&mut self, dst: VReg, src: VReg)

Widens the low lanes of the input vector, as unsigned, to twice the width.

fn vwidenhigh8x16_s(&mut self, dst: VReg, src: VReg)

Widens the high lanes of the input vector, as signed, to twice the width.

fn vwidenhigh8x16_u(&mut self, dst: VReg, src: VReg)

Widens the high lanes of the input vector, as unsigned, to twice the width.

fn vwidenhigh16x8_s(&mut self, dst: VReg, src: VReg)

Widens the high lanes of the input vector, as signed, to twice the width.

fn vwidenhigh16x8_u(&mut self, dst: VReg, src: VReg)

Widens the high lanes of the input vector, as unsigned, to twice the width.

fn vwidenhigh32x4_s(&mut self, dst: VReg, src: VReg)

Widens the high lanes of the input vector, as signed, to twice the width.

fn vwidenhigh32x4_u(&mut self, dst: VReg, src: VReg)

Widens the high lanes of the input vector, as unsigned, to twice the width.

fn vnarrow16x8_s(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 16x8 vectors, assuming all input lanes are signed, to half the width. Narrowing is signed and saturating.

fn vnarrow16x8_u(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 16x8 vectors, assuming all input lanes are signed, to half the width. Narrowing is unsigned and saturating.

fn vnarrow32x4_s(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 32x4 vectors, assuming all input lanes are signed, to half the width. Narrowing is signed and saturating.

fn vnarrow32x4_u(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 32x4 vectors, assuming all input lanes are signed, to half the width. Narrowing is unsigned and saturating.

fn vnarrow64x2_s(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 64x2 vectors, assuming all input lanes are signed, to half the width. Narrowing is signed and saturating.

fn vnarrow64x2_u(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 64x2 vectors, assuming all input lanes are signed, to half the width. Narrowing is unsigned and saturating.

fn vunarrow64x2_u(&mut self, operands: BinaryOperands<VReg>)

Narrows the two 64x2 vectors, assuming all input lanes are unsigned, to half the width. Narrowing is unsigned and saturating.

fn vfpromotelow(&mut self, dst: VReg, src: VReg)

Promotes the low two lanes of the f32x4 input to f64x2.

fn vfdemote(&mut self, dst: VReg, src: VReg)

Demotes the two f64x2 lanes to f32x2 and then extends with two more zero lanes.

fn vsubi8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src1 - src2

fn vsubi16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src1 - src2

fn vsubi32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src1 - src2

fn vsubi64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 - src2

fn vsubf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 - src2

fn vsubi8x16_sat(&mut self, operands: BinaryOperands<VReg>)

dst = saturating_sub(src1, src2)

fn vsubu8x16_sat(&mut self, operands: BinaryOperands<VReg>)

dst = saturating_sub(src1, src2)

fn vsubi16x8_sat(&mut self, operands: BinaryOperands<VReg>)

dst = saturating_sub(src1, src2)

fn vsubu16x8_sat(&mut self, operands: BinaryOperands<VReg>)

dst = saturating_sub(src1, src2)

fn vmuli8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src1 * src2

fn vmuli16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src1 * src2

fn vmuli32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src1 * src2

fn vmuli64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 * src2

fn vmulf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src1 * src2

fn vqmulrsi16x8(&mut self, operands: BinaryOperands<VReg>)

dst = signed_saturate(src1 * src2 + (1 << (Q - 1)) >> Q)

fn vpopcnt8x16(&mut self, dst: VReg, src: VReg)

dst = count_ones(src)

fn xextractv8x16(&mut self, dst: XReg, src: VReg, lane: u8)

low32(dst) = zext(src[lane])

fn xextractv16x8(&mut self, dst: XReg, src: VReg, lane: u8)

low32(dst) = zext(src[lane])

fn xextractv32x4(&mut self, dst: XReg, src: VReg, lane: u8)

low32(dst) = src[lane]

fn xextractv64x2(&mut self, dst: XReg, src: VReg, lane: u8)

dst = src[lane]

fn fextractv32x4(&mut self, dst: FReg, src: VReg, lane: u8)

low32(dst) = src[lane]

fn fextractv64x2(&mut self, dst: FReg, src: VReg, lane: u8)

dst = src[lane]

fn vinsertx8(&mut self, operands: BinaryOperands<VReg, VReg, XReg>, lane: u8)

dst = src1; dst[lane] = src2

fn vinsertx16(&mut self, operands: BinaryOperands<VReg, VReg, XReg>, lane: u8)

dst = src1; dst[lane] = src2

fn vinsertx32(&mut self, operands: BinaryOperands<VReg, VReg, XReg>, lane: u8)

dst = src1; dst[lane] = src2

fn vinsertx64(&mut self, operands: BinaryOperands<VReg, VReg, XReg>, lane: u8)

dst = src1; dst[lane] = src2

fn vinsertf32(&mut self, operands: BinaryOperands<VReg, VReg, FReg>, lane: u8)

dst = src1; dst[lane] = src2

fn vinsertf64(&mut self, operands: BinaryOperands<VReg, VReg, FReg>, lane: u8)

dst = src1; dst[lane] = src2

fn veq8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src == dst

fn vneq8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src != dst

fn vslt8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (signed)

fn vslteq8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (signed)

fn vult8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (unsigned)

fn vulteq8x16(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (unsigned)

fn veq16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src == dst

fn vneq16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src != dst

fn vslt16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (signed)

fn vslteq16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (signed)

fn vult16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (unsigned)

fn vulteq16x8(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (unsigned)

fn veq32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src == dst

fn vneq32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src != dst

fn vslt32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (signed)

fn vslteq32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (signed)

fn vult32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (unsigned)

fn vulteq32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (unsigned)

fn veq64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src == dst

fn vneq64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src != dst

fn vslt64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (signed)

fn vslteq64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (signed)

fn vult64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst (unsigned)

fn vulteq64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst (unsigned)

fn vneg8x16(&mut self, dst: VReg, src: VReg)

dst = -src

fn vneg16x8(&mut self, dst: VReg, src: VReg)

dst = -src

fn vneg32x4(&mut self, dst: VReg, src: VReg)

dst = -src

fn vneg64x2(&mut self, dst: VReg, src: VReg)

dst = -src

fn vnegf64x2(&mut self, dst: VReg, src: VReg)

dst = -src

fn vmin8x16_s(&mut self, operands: BinaryOperands<VReg>)

dst = min(src1, src2) (signed)

fn vmin8x16_u(&mut self, operands: BinaryOperands<VReg>)

dst = min(src1, src2) (unsigned)

fn vmin16x8_s(&mut self, operands: BinaryOperands<VReg>)

dst = min(src1, src2) (signed)

fn vmin16x8_u(&mut self, operands: BinaryOperands<VReg>)

dst = min(src1, src2) (unsigned)

fn vmax8x16_s(&mut self, operands: BinaryOperands<VReg>)

dst = max(src1, src2) (signed)

fn vmax8x16_u(&mut self, operands: BinaryOperands<VReg>)

dst = max(src1, src2) (unsigned)

fn vmax16x8_s(&mut self, operands: BinaryOperands<VReg>)

dst = max(src1, src2) (signed)

fn vmax16x8_u(&mut self, operands: BinaryOperands<VReg>)

dst = max(src1, src2) (unsigned)

fn vmin32x4_s(&mut self, operands: BinaryOperands<VReg>)

dst = min(src1, src2) (signed)

fn vmin32x4_u(&mut self, operands: BinaryOperands<VReg>)

dst = min(src1, src2) (unsigned)

fn vmax32x4_s(&mut self, operands: BinaryOperands<VReg>)

dst = max(src1, src2) (signed)

fn vmax32x4_u(&mut self, operands: BinaryOperands<VReg>)

dst = max(src1, src2) (unsigned)

fn vabs8x16(&mut self, dst: VReg, src: VReg)

dst = |src|

fn vabs16x8(&mut self, dst: VReg, src: VReg)

dst = |src|

fn vabs32x4(&mut self, dst: VReg, src: VReg)

dst = |src|

fn vabs64x2(&mut self, dst: VReg, src: VReg)

dst = |src|

fn vabsf32x4(&mut self, dst: VReg, src: VReg)

dst = |src|

fn vabsf64x2(&mut self, dst: VReg, src: VReg)

dst = |src|

fn vmaximumf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = ieee_maximum(src1, src2)

fn vmaximumf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = ieee_maximum(src1, src2)

fn vminimumf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = ieee_minimum(src1, src2)

fn vminimumf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = ieee_minimum(src1, src2)

fn vshuffle(&mut self, dst: VReg, src1: VReg, src2: VReg, mask: u128)

dst = shuffle(src1, src2, mask)

fn vswizzlei8x16(&mut self, operands: BinaryOperands<VReg>)

dst = swizzle(src1, src2)

fn vavground8x16(&mut self, operands: BinaryOperands<VReg>)

dst = (src1 + src2 + 1) // 2

fn vavground16x8(&mut self, operands: BinaryOperands<VReg>)

dst = (src1 + src2 + 1) // 2

fn veqf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src == dst

fn vneqf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src != dst

fn vltf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst

fn vlteqf32x4(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst

fn veqf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src == dst

fn vneqf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src != dst

fn vltf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src < dst

fn vlteqf64x2(&mut self, operands: BinaryOperands<VReg>)

dst = src <= dst

fn vfma32x4(&mut self, dst: VReg, a: VReg, b: VReg, c: VReg)

dst = ieee_fma(a, b, c)

fn vfma64x2(&mut self, dst: VReg, a: VReg, b: VReg, c: VReg)

dst = ieee_fma(a, b, c)

fn vselect(&mut self, dst: VReg, cond: XReg, if_nonzero: VReg, if_zero: VReg)

dst = low32(cond) ? if_nonzero : if_zero

fn xadd128( &mut self, dst_lo: XReg, dst_hi: XReg, lhs_lo: XReg, lhs_hi: XReg, rhs_lo: XReg, rhs_hi: XReg, )

dst_hi:dst_lo = lhs_hi:lhs_lo + rhs_hi:rhs_lo

fn xsub128( &mut self, dst_lo: XReg, dst_hi: XReg, lhs_lo: XReg, lhs_hi: XReg, rhs_lo: XReg, rhs_hi: XReg, )

dst_hi:dst_lo = lhs_hi:lhs_lo - rhs_hi:rhs_lo

fn xwidemul64_s(&mut self, dst_lo: XReg, dst_hi: XReg, lhs: XReg, rhs: XReg)

dst_hi:dst_lo = sext(lhs) * sext(rhs)

fn xwidemul64_u(&mut self, dst_lo: XReg, dst_hi: XReg, lhs: XReg, rhs: XReg)

dst_hi:dst_lo = zext(lhs) * zext(rhs)

impl<'a> OpVisitor for Disassembler<'a>

type BytecodeStream = SafeBytecodeStream<'a>

The type of this visitor’s bytecode stream.

type Return = ()

The type of values returned by each visitor method.

fn bytecode(&mut self) -> &mut Self::BytecodeStream

Get this visitor’s underlying bytecode stream.

fn before_visit(&mut self)

A callback invoked before starting to decode an instruction.

fn after_visit(&mut self)

A callback invoked after an instruction has been completely decoded.

fn ret(&mut self)

Transfer control the address in the lr register.

fn call(&mut self, offset: PcRelOffset)

Transfer control to the PC at the given offset and set the lr register to the PC just after this instruction.

fn call1(&mut self, arg1: XReg, offset: PcRelOffset)

Like call, but also x0 = arg1

fn call2(&mut self, arg1: XReg, arg2: XReg, offset: PcRelOffset)

Like call, but also x0, x1 = arg1, arg2

fn call3(&mut self, arg1: XReg, arg2: XReg, arg3: XReg, offset: PcRelOffset)

Like call, but also x0, x1, x2 = arg1, arg2, arg3

fn call4( &mut self, arg1: XReg, arg2: XReg, arg3: XReg, arg4: XReg, offset: PcRelOffset, )

Like call, but also x0, x1, x2, x3 = arg1, arg2, arg3, arg4

fn call_indirect(&mut self, reg: XReg)

Transfer control to the PC in reg and set lr to the PC just after this instruction.

fn jump(&mut self, offset: PcRelOffset)

Unconditionally transfer control to the PC at the given offset.

fn xjump(&mut self, reg: XReg)

Unconditionally transfer control to the PC at specified register.

fn br_if32(&mut self, cond: XReg, offset: PcRelOffset)

Conditionally transfer control to the given PC offset if low32(cond) contains a non-zero value.

fn br_if_not32(&mut self, cond: XReg, offset: PcRelOffset)

Conditionally transfer control to the given PC offset if low32(cond) contains a zero value.

fn br_if_xeq32(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if a == b.

fn br_if_xneq32(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if a != b.

fn br_if_xslt32(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if signed a < b.

fn br_if_xslteq32(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if signed a <= b.

fn br_if_xult32(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if unsigned a < b.

fn br_if_xulteq32(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if unsigned a <= b.

fn br_if_xeq64(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if a == b.

fn br_if_xneq64(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if a != b.

fn br_if_xslt64(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if signed a < b.

fn br_if_xslteq64(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if signed a <= b.

fn br_if_xult64(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if unsigned a < b.

fn br_if_xulteq64(&mut self, a: XReg, b: XReg, offset: PcRelOffset)

Branch if unsigned a <= b.

fn br_if_xeq32_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if a == b.

fn br_if_xeq32_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if a == b.

fn br_if_xneq32_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if a != b.

fn br_if_xneq32_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if a != b.

fn br_if_xslt32_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a < b.

fn br_if_xslt32_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a < b.

fn br_if_xsgt32_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a > b.

fn br_if_xsgt32_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a > b.

fn br_if_xslteq32_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a <= b.

fn br_if_xslteq32_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a <= b.

fn br_if_xsgteq32_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a >= b.

fn br_if_xsgteq32_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a >= b.

fn br_if_xult32_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a < b.

fn br_if_xult32_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a < b.

fn br_if_xulteq32_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a <= b.

fn br_if_xulteq32_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a <= b.

fn br_if_xugt32_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a > b.

fn br_if_xugt32_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a > b.

fn br_if_xugteq32_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a >= b.

fn br_if_xugteq32_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a >= b.

fn br_if_xeq64_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if a == b.

fn br_if_xeq64_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if a == b.

fn br_if_xneq64_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if a != b.

fn br_if_xneq64_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if a != b.

fn br_if_xslt64_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a < b.

fn br_if_xslt64_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a < b.

fn br_if_xsgt64_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a > b.

fn br_if_xsgt64_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a > b.

fn br_if_xslteq64_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a <= b.

fn br_if_xslteq64_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a <= b.

fn br_if_xsgteq64_i8(&mut self, a: XReg, b: i8, offset: PcRelOffset)

Branch if signed a >= b.

fn br_if_xsgteq64_i32(&mut self, a: XReg, b: i32, offset: PcRelOffset)

Branch if signed a >= b.

fn br_if_xult64_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a < b.

fn br_if_xult64_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a < b.

fn br_if_xulteq64_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a <= b.

fn br_if_xulteq64_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a <= b.

fn br_if_xugt64_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a > b.

fn br_if_xugt64_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a > b.

fn br_if_xugteq64_u8(&mut self, a: XReg, b: u8, offset: PcRelOffset)

Branch if unsigned a >= b.

fn br_if_xugteq64_u32(&mut self, a: XReg, b: u32, offset: PcRelOffset)

Branch if unsigned a >= b.

fn br_table32(&mut self, idx: XReg, amt: u32)

Branch to the label indicated by low32(idx).

fn xmov(&mut self, dst: XReg, src: XReg)

Move between x registers.

fn xzero(&mut self, dst: XReg)

Set dst = 0

fn xone(&mut self, dst: XReg)

Set dst = 1

fn xconst8(&mut self, dst: XReg, imm: i8)

Set dst = sign_extend(imm8).

fn xconst16(&mut self, dst: XReg, imm: i16)

Set dst = sign_extend(imm16).

fn xconst32(&mut self, dst: XReg, imm: i32)

Set dst = sign_extend(imm32).

fn xconst64(&mut self, dst: XReg, imm: i64)

Set dst = imm64.

fn xadd32(&mut self, operands: BinaryOperands<XReg>)

32-bit wrapping addition: low32(dst) = low32(src1) + low32(src2).

fn xadd32_u8(&mut self, dst: XReg, src1: XReg, src2: u8)

Same as xadd32 but src2 is a zero-extended 8-bit immediate.

fn xadd32_u32(&mut self, dst: XReg, src1: XReg, src2: u32)

Same as xadd32 but src2 is a 32-bit immediate.

fn xadd64(&mut self, operands: BinaryOperands<XReg>)

64-bit wrapping addition: dst = src1 + src2.

fn xadd64_u8(&mut self, dst: XReg, src1: XReg, src2: u8)

Same as xadd64 but src2 is a zero-extended 8-bit immediate.

fn xadd64_u32(&mut self, dst: XReg, src1: XReg, src2: u32)

Same as xadd64 but src2 is a zero-extended 32-bit immediate.

fn xmadd32(&mut self, dst: XReg, src1: XReg, src2: XReg, src3: XReg)

low32(dst) = low32(src1) * low32(src2) + low32(src3)

fn xmadd64(&mut self, dst: XReg, src1: XReg, src2: XReg, src3: XReg)

dst = src1 * src2 + src3

fn xsub32(&mut self, operands: BinaryOperands<XReg>)

32-bit wrapping subtraction: low32(dst) = low32(src1) - low32(src2).

fn xsub32_u8(&mut self, dst: XReg, src1: XReg, src2: u8)

Same as xsub32 but src2 is a zero-extended 8-bit immediate.

fn xsub32_u32(&mut self, dst: XReg, src1: XReg, src2: u32)

Same as xsub32 but src2 is a 32-bit immediate.

fn xsub64(&mut self, operands: BinaryOperands<XReg>)

64-bit wrapping subtraction: dst = src1 - src2.

fn xsub64_u8(&mut self, dst: XReg, src1: XReg, src2: u8)

Same as xsub64 but src2 is a zero-extended 8-bit immediate.

fn xsub64_u32(&mut self, dst: XReg, src1: XReg, src2: u32)

Same as xsub64 but src2 is a zero-extended 32-bit immediate.

fn xmul32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) * low32(src2)

fn xmul32_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xmul64 but src2 is a sign-extended 8-bit immediate.

fn xmul32_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xmul32 but src2 is a sign-extended 32-bit immediate.

fn xmul64(&mut self, operands: BinaryOperands<XReg>)

dst = src1 * src2

fn xmul64_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xmul64 but src2 is a sign-extended 8-bit immediate.

fn xmul64_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xmul64 but src2 is a sign-extended 64-bit immediate.

fn xctz32(&mut self, dst: XReg, src: XReg)

low32(dst) = trailing_zeros(low32(src))

fn xctz64(&mut self, dst: XReg, src: XReg)

dst = trailing_zeros(src)

fn xclz32(&mut self, dst: XReg, src: XReg)

low32(dst) = leading_zeros(low32(src))

fn xclz64(&mut self, dst: XReg, src: XReg)

dst = leading_zeros(src)

fn xpopcnt32(&mut self, dst: XReg, src: XReg)

low32(dst) = count_ones(low32(src))

fn xpopcnt64(&mut self, dst: XReg, src: XReg)

dst = count_ones(src)

fn xrotl32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = rotate_left(low32(src1), low32(src2))

fn xrotl64(&mut self, operands: BinaryOperands<XReg>)

dst = rotate_left(src1, src2)

fn xrotr32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = rotate_right(low32(src1), low32(src2))

fn xrotr64(&mut self, operands: BinaryOperands<XReg>)

dst = rotate_right(src1, src2)

fn xshl32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) << low5(src2)

fn xshr32_s(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) >> low5(src2)

fn xshr32_u(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) >> low5(src2)

fn xshl64(&mut self, operands: BinaryOperands<XReg>)

dst = src1 << low5(src2)

fn xshr64_s(&mut self, operands: BinaryOperands<XReg>)

dst = src1 >> low6(src2)

fn xshr64_u(&mut self, operands: BinaryOperands<XReg>)

dst = src1 >> low6(src2)

fn xshl32_u6(&mut self, operands: BinaryOperands<XReg, XReg, U6>)

low32(dst) = low32(src1) << low5(src2)

fn xshr32_s_u6(&mut self, operands: BinaryOperands<XReg, XReg, U6>)

low32(dst) = low32(src1) >> low5(src2)

fn xshr32_u_u6(&mut self, operands: BinaryOperands<XReg, XReg, U6>)

low32(dst) = low32(src1) >> low5(src2)

fn xshl64_u6(&mut self, operands: BinaryOperands<XReg, XReg, U6>)

dst = src1 << low5(src2)

fn xshr64_s_u6(&mut self, operands: BinaryOperands<XReg, XReg, U6>)

dst = src1 >> low6(src2)

fn xshr64_u_u6(&mut self, operands: BinaryOperands<XReg, XReg, U6>)

dst = src1 >> low6(src2)

fn xneg32(&mut self, dst: XReg, src: XReg)

low32(dst) = -low32(src)

fn xneg64(&mut self, dst: XReg, src: XReg)

dst = -src

fn xeq64(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = src1 == src2

fn xneq64(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = src1 != src2

fn xslt64(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = src1 < src2 (signed)

fn xslteq64(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = src1 <= src2 (signed)

fn xult64(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = src1 < src2 (unsigned)

fn xulteq64(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = src1 <= src2 (unsigned)

fn xeq32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) == low32(src2)

fn xneq32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) != low32(src2)

fn xslt32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) < low32(src2) (signed)

fn xslteq32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) <= low32(src2) (signed)

fn xult32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) < low32(src2) (unsigned)

fn xulteq32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) <= low32(src2) (unsigned)

fn xload8_u32_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = zext_8_32(*addr)

fn xload8_s32_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = sext_8_32(*addr)

fn xload16le_u32_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = o32ext_16_32(*addr)

fn xload16le_s32_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = sext_16_32(*addr)

fn xload32le_o32(&mut self, dst: XReg, addr: AddrO32)

low32(dst) = *addr

fn xload64le_o32(&mut self, dst: XReg, addr: AddrO32)

dst = *addr

fn xstore8_o32(&mut self, addr: AddrO32, src: XReg)

*addr = low8(src)

fn xstore16le_o32(&mut self, addr: AddrO32, src: XReg)

*addr = low16(src)

fn xstore32le_o32(&mut self, addr: AddrO32, src: XReg)

*addr = low32(src)

fn xstore64le_o32(&mut self, addr: AddrO32, src: XReg)

*addr = src

fn xload8_u32_z(&mut self, dst: XReg, addr: AddrZ)

low32(dst) = zext_8_32(*addr)

fn xload8_s32_z(&mut self, dst: XReg, addr: AddrZ)

low32(dst) = sext_8_32(*addr)

fn xload16le_u32_z(&mut self, dst: XReg, addr: AddrZ)

low32(dst) = zext_16_32(*addr)

fn xload16le_s32_z(&mut self, dst: XReg, addr: AddrZ)

low32(dst) = sext_16_32(*addr)

fn xload32le_z(&mut self, dst: XReg, addr: AddrZ)

low32(dst) = *addr

fn xload64le_z(&mut self, dst: XReg, addr: AddrZ)

dst = *addr

fn xstore8_z(&mut self, addr: AddrZ, src: XReg)

*addr = low8(src)

fn xstore16le_z(&mut self, addr: AddrZ, src: XReg)

*addr = low16(src)

fn xstore32le_z(&mut self, addr: AddrZ, src: XReg)

*addr = low32(src)

fn xstore64le_z(&mut self, addr: AddrZ, src: XReg)

*addr = src

fn xload8_u32_g32(&mut self, dst: XReg, addr: AddrG32)

low32(dst) = zext_8_32(*addr)

fn xload8_s32_g32(&mut self, dst: XReg, addr: AddrG32)

low32(dst) = sext_8_32(*addr)

fn xload16le_u32_g32(&mut self, dst: XReg, addr: AddrG32)

low32(dst) = zext_16_32(*addr)

fn xload16le_s32_g32(&mut self, dst: XReg, addr: AddrG32)

low32(dst) = sext_16_32(*addr)

fn xload32le_g32(&mut self, dst: XReg, addr: AddrG32)

low32(dst) = *addr

fn xload64le_g32(&mut self, dst: XReg, addr: AddrG32)

dst = *addr

fn xstore8_g32(&mut self, addr: AddrG32, src: XReg)

*addr = low8(src)

fn xstore16le_g32(&mut self, addr: AddrG32, src: XReg)

*addr = low16(src)

fn xstore32le_g32(&mut self, addr: AddrG32, src: XReg)

*addr = low32(src)

fn xstore64le_g32(&mut self, addr: AddrG32, src: XReg)

*addr = src

fn xload8_u32_g32bne(&mut self, dst: XReg, addr: AddrG32Bne)

low32(dst) = zext_8_32(*addr)

fn xload8_s32_g32bne(&mut self, dst: XReg, addr: AddrG32Bne)

low32(dst) = sext_8_32(*addr)

fn xload16le_u32_g32bne(&mut self, dst: XReg, addr: AddrG32Bne)

low32(dst) = zext_16_32(*addr)

fn xload16le_s32_g32bne(&mut self, dst: XReg, addr: AddrG32Bne)

low32(dst) = sext_16_32(*addr)

fn xload32le_g32bne(&mut self, dst: XReg, addr: AddrG32Bne)

low32(dst) = *addr

fn xload64le_g32bne(&mut self, dst: XReg, addr: AddrG32Bne)

dst = *addr

fn xstore8_g32bne(&mut self, addr: AddrG32Bne, src: XReg)

*addr = low8(src)

fn xstore16le_g32bne(&mut self, addr: AddrG32Bne, src: XReg)

*addr = low16(src)

fn xstore32le_g32bne(&mut self, addr: AddrG32Bne, src: XReg)

*addr = low32(src)

fn xstore64le_g32bne(&mut self, addr: AddrG32Bne, src: XReg)

*addr = src

fn push_frame(&mut self)

push lr; push fp; fp = sp

fn pop_frame(&mut self)

sp = fp; pop fp; pop lr

fn push_frame_save(&mut self, amt: u16, regs: UpperRegSet<XReg>)

Macro-instruction to enter a function, allocate some stack, and then save some registers.

fn pop_frame_restore(&mut self, amt: u16, regs: UpperRegSet<XReg>)

Inverse of push_frame_save. Restores regs from the top of the stack, then runs stack_free32 amt, then runs pop_frame.

fn stack_alloc32(&mut self, amt: u32)

sp = sp.checked_sub(amt)

fn stack_free32(&mut self, amt: u32)

sp = sp + amt

fn zext8(&mut self, dst: XReg, src: XReg)

dst = zext(low8(src))

fn zext16(&mut self, dst: XReg, src: XReg)

dst = zext(low16(src))

fn zext32(&mut self, dst: XReg, src: XReg)

dst = zext(low32(src))

fn sext8(&mut self, dst: XReg, src: XReg)

dst = sext(low8(src))

fn sext16(&mut self, dst: XReg, src: XReg)

dst = sext(low16(src))

fn sext32(&mut self, dst: XReg, src: XReg)

dst = sext(low32(src))

fn xabs32(&mut self, dst: XReg, src: XReg)

low32(dst) = |low32(src)|

fn xabs64(&mut self, dst: XReg, src: XReg)

dst = |src|

fn xdiv32_s(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) / low32(src2) (signed)

fn xdiv64_s(&mut self, operands: BinaryOperands<XReg>)

dst = src1 / src2 (signed)

fn xdiv32_u(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) / low32(src2) (unsigned)

fn xdiv64_u(&mut self, operands: BinaryOperands<XReg>)

dst = src1 / src2 (unsigned)

fn xrem32_s(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) % low32(src2) (signed)

fn xrem64_s(&mut self, operands: BinaryOperands<XReg>)

dst = src1 / src2 (signed)

fn xrem32_u(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) % low32(src2) (unsigned)

fn xrem64_u(&mut self, operands: BinaryOperands<XReg>)

dst = src1 / src2 (unsigned)

fn xband32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) & low32(src2)

fn xband32_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xband64 but src2 is a sign-extended 8-bit immediate.

fn xband32_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xband32 but src2 is a sign-extended 32-bit immediate.

fn xband64(&mut self, operands: BinaryOperands<XReg>)

dst = src1 & src2

fn xband64_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xband64 but src2 is a sign-extended 8-bit immediate.

fn xband64_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xband64 but src2 is a sign-extended 32-bit immediate.

fn xbor32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) | low32(src2)

fn xbor32_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xbor64 but src2 is a sign-extended 8-bit immediate.

fn xbor32_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xbor32 but src2 is a sign-extended 32-bit immediate.

fn xbor64(&mut self, operands: BinaryOperands<XReg>)

dst = src1 | src2

fn xbor64_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xbor64 but src2 is a sign-extended 8-bit immediate.

fn xbor64_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xbor64 but src2 is a sign-extended 32-bit immediate.

fn xbxor32(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = low32(src1) ^ low32(src2)

fn xbxor32_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xbxor64 but src2 is a sign-extended 8-bit immediate.

fn xbxor32_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xbxor32 but src2 is a sign-extended 32-bit immediate.

fn xbxor64(&mut self, operands: BinaryOperands<XReg>)

dst = src1 ^ src2

fn xbxor64_s8(&mut self, dst: XReg, src1: XReg, src2: i8)

Same as xbxor64 but src2 is a sign-extended 8-bit immediate.

fn xbxor64_s32(&mut self, dst: XReg, src1: XReg, src2: i32)

Same as xbxor64 but src2 is a sign-extended 32-bit immediate.

fn xbnot32(&mut self, dst: XReg, src: XReg)

low32(dst) = !low32(src1)

fn xbnot64(&mut self, dst: XReg, src: XReg)

dst = !src1

fn xmin32_u(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = min(low32(src1), low32(src2)) (unsigned)

fn xmin32_s(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = min(low32(src1), low32(src2)) (signed)

fn xmax32_u(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = max(low32(src1), low32(src2)) (unsigned)

fn xmax32_s(&mut self, operands: BinaryOperands<XReg>)

low32(dst) = max(low32(src1), low32(src2)) (signed)

fn xmin64_u(&mut self, operands: BinaryOperands<XReg>)

dst = min(src1, src2) (unsigned)

fn xmin64_s(&mut self, operands: BinaryOperands<XReg>)

dst = min(src1, src2) (signed)

fn xmax64_u(&mut self, operands: BinaryOperands<XReg>)

dst = max(src1, src2) (unsigned)

fn xmax64_s(&mut self, operands: BinaryOperands<XReg>)

dst = max(src1, src2) (signed)

fn xselect32(&mut self, dst: XReg, cond: XReg, if_nonzero: XReg, if_zero: XReg)

low32(dst) = low32(cond) ? low32(if_nonzero) : low32(if_zero)

fn xselect64(&mut self, dst: XReg, cond: XReg, if_nonzero: XReg, if_zero: XReg)

dst = low32(cond) ? if_nonzero : if_zero